1. Field of the Invention
The present invention relates to information handling systems and more particularly to supporting switchable graphics via a single voltage regulator.
2. Description of the Related Art
As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to users is information handling systems. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may also vary regarding what information is handled, how the information is handled, how much information is processed, stored, or communicated, and how quickly and efficiently the information may be processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
It is known to provide information handling systems with a hybrid graphics implementation. In a hybrid graphics implementation, an integrated Graphics Processing Unit (iGPU) and the discrete Graphics Processing Unit (dGPU) are operational at different times (i.e., domains) and in different power states (P-states) depending on the state of the information handling system. Known hybrid graphics implementations generally use two independent voltage regulators (VRs) to support the iGPU and the dGPU because their voltage level requirements are often quite different. For example, the voltage level requirements for a known iGPU (such as the Arrandale Dual Core iGPU available from Intel Corporation) is via the voltage identification (VID) pins of the iGPU. Known iGPU systems often require seven bits of the VID signal. Another known iGPU will be controlled via the serial voltage identification (SVID) pins. Additionally, both of these iGPUs can require the use of a two-phase solution so as to provide better thermal performance and reliability.
With known dGPUs the voltage level requirement is often for three different voltage levels. The three voltage levels can be provided via a voltage regulator without the need for VID pins. However, it is often difficult to use the same voltage regulator (i.e., a voltage regulator which includes VID pins) to support both iGPU and dGPU because the VIDs are usually only generated by a iGPU as compared to a dGPU.
FIG. 1, labeled Prior Art, shows one example of a known voltage regulator solution in which two independent voltage regulators are used to support switchable GPUs. In this example, one of the voltage regulators is controlled via the VID pins of the integrated graphics controller whereas the other voltage regulator output is controlled via general purpose input/output (GPIO) pins of an embedded controller. FIG. 2, labeled Prior Art, shows another example of a known voltage regulator solution. With this voltage regulator solution, a single voltage regulator is used meet the power requirements for both iGPU and dGPU. However, in this solution, it is not clear how the GPIO control bits are used to fulfill the power requirements of both iGPU and dGPU. With this solution, the 7 VID bits are sent by iGPU directly to the voltage regulator. Accordingly, an embedded controller within the voltage regulator needs to use seven GPIO pins to change their VID value to generate a suitable voltage while the information handling system is operating in a dGPU mode of operation. These seven GPIO bits share the same 7-bit VID truth table of voltage regulator. Such a system also adds signal Mosfets to isolate the signal between an embedded controller (EC) and iGPU on these bits. Also, because voltage level of VID may not be the same as the voltage level of the GPIO, it may be necessary to provide a voltage shifter for each pin. FIG. 3, labeled Prior Art, shows another example of a known voltage regulator solution. In this solution, the voltage regulator uses two pins to select one of voltages in its VID table which is loaded via SVID pins.
Accordingly, it would be desirable to provide a voltage regulator solution to address some or all of these issues. For example, it would be desirable to provide a voltage regulator which prevents the changing of VID values while the information handling system is operating in a dGPU mode of operation. Also, it would be desirable to provide a voltage regulator which generates both two-phase power as well as one-phase power to support switchable graphics technology.